KTH-MST has been developing generic 3D technology platforms for wafer-level integration of MEMS on top of integrated circuits (ICs) and for wafer-level packaging. Heterogeneous 3D technology platforms allow the integration of mono-crystalline silicon MEMS sensors and actuators on standard, CMOS-based integrated circuit (IC) wafers. The 3D-MEMS platforms are fully compatible with MEMS foundry processes and thus allow foundry-less business models. The Figure shows a schematic of the 3D integration process flow. The IC integrated MEMS components may consist of extremely thin mono-crystalline silicon membranes (< 200 nm) with minimum feature sizes of below 500 nm. The vias between the MEMS parts and the IC can be less than 1 µm long and less than 2 µm in diameter.
The 3D-MEMS integration platforms are currently being used for the integration of mono-crystalline silicon micro-mirror arrays on ICs and for IC integrated infrared bolometer arrays. The 3D MEMS integration platforms can also be implemented for IC integrated pressure sensors, microphones, inertial sensors and resonators.
For research co-operations (incl. EU FP7 proposals) and proof-of-concept demonstrators, please contact Dr. Frank Niklaus and for technology IPR licensing visit Faun AB.
F. Niklaus, P. Enoksson, P. Griss, E. Kälvesten, G. Stemme, “Low Temperature Wafer Level Transfer Bonding”, IEEE Journal of Microelectromechanical Systems, Vol.10, No.4, pp.525-531, 2001.
Projects within 3D-MEMS Integration on ICs |